Digital Logic Tool

Decoder Simulator

Simulate binary decoders online. Learn how 2-to-4 and 3-to-8 decoders work in address decoding, memory selection, and seven-segment displays. Free tool.

Overview

A decoder is a combinational logic circuit that converts an n-bit binary input into one of 2^n unique output lines. With N input bits, the decoder activates exactly one of 2^N outputs based on the binary value of the input. A 2-to-4 decoder has 2 inputs and 4 outputs; a 3-to-8 decoder has 3 inputs and 8 outputs.

Decoders are fundamental to memory address decoding, multiplexer data routing, display driving (including seven-segment displays), and instruction decoding in CPUs. Every time a computer accesses a specific memory chip or I/O device from many, a decoder selects the one that matches the address.

In the simulator, you can build a simple 2-to-4 decoder using AND gates and NOT gates, and watch how different 2-bit inputs activate different outputs. The prebuilt circuit library also includes decoder circuits for hands-on exploration.

How It Works

A 2-to-4 decoder with inputs A and B produces four outputs: Y0 = A'B' (active when A=0, B=0) Y1 = A'B (active when A=0, B=1) Y2 = AB' (active when A=1, B=0) Y3 = AB (active when A=1, B=1)

Each output is a minterm — an AND gate with the inputs in their true or complemented form. Only one output is HIGH at any time. Most real decoders include an Enable (EN) input: when EN=0, all outputs are forced LOW regardless of inputs.

A 3-to-8 decoder adds a third input line and activates one of 8 outputs. Two 2-to-4 decoders can be combined with their enable pins driven by the third input line to form a 3-to-8 decoder.

Real-World Applications

Memory Address Decoding

CPUs use decoders to select exactly one memory chip (ROM, RAM, or I/O) from all connected devices based on the address bus value.

Seven-Segment Display Driving

A BCD-to-seven-segment decoder converts a 4-bit binary number to the seven segment control signals that display decimal digits 0–9.

Instruction Decoding in CPUs

The instruction decode unit uses decoders to identify which operation code is present and activate the corresponding execution path.

Demultiplexing Data

A decoder with a data enable input acts as a 1-to-N demultiplexer, routing one data stream to one of many outputs.

Keyboard and Keypad Scanning

Matrix keypad scanning circuits use decoders to activate one row at a time, enabling column sensing for pressed keys.

Try It in the Interactive Simulator

Build Decoder circuits in real time — drag gates, connect wires, toggle inputs, and see outputs update instantly.

Frequently Asked Questions

  • What is a binary decoder?

    A binary decoder converts an N-bit binary input to one of 2^N output lines. With input value K, output line K is HIGH (active) and all others are LOW. It is the inverse of an encoder.

  • How does a 2-to-4 decoder work?

    A 2-to-4 decoder has 2 inputs (A, B) and 4 outputs (Y0–Y3). Each output is one minterm: Y0=A'B', Y1=A'B, Y2=AB', Y3=AB. The input binary value selects which output is active.

  • What is the difference between a decoder and a demultiplexer?

    A decoder selects one of N outputs based on a binary input code. A demultiplexer also routes one input DATA signal to one of N outputs selected by the binary code. A decoder with a data enable input is a demultiplexer.

  • What is an enable input on a decoder?

    An enable (EN) input, when LOW, forces all decoder outputs to LOW regardless of the input code. It allows multiple decoders to share an output bus by enabling only one at a time.

  • What IC implements a decoder?

    Common decoder ICs include the 74HC138 (3-to-8 decoder), 74HC154 (4-to-16 decoder), and 74HC4511 (BCD-to-seven-segment decoder).