Overview
A truth table is a systematic tabular representation that lists every possible combination of input values for a boolean function and shows the corresponding output for each. Truth tables are the fundamental language of digital logic — they completely and unambiguously define any logic gate, combinational circuit, or boolean expression.
For a circuit with N input variables, the truth table has 2^N rows (one per unique input combination). Inputs are typically listed in binary counting order from all zeros to all ones. For a 2-input gate, that is 4 rows (00, 01, 10, 11). For a 3-input circuit, 8 rows. For a 4-input circuit, 16 rows.
The truth table generator in the simulator displays the truth table for any gate you click on, showing real-time highlighted rows as you toggle inputs. The prebuilt circuit library also shows truth tables for complete circuits like adders, multiplexers, and decoders.
How It Works
To generate a truth table manually: list all input variables as column headers, then add an output column. Fill in the rows using binary counting order for the inputs (start from all zeros). Evaluate the boolean function for each row to determine the output.
For multi-output circuits (like adders with Sum and Carry outputs), add a column for each output. For a half adder with inputs A and B: the Sum column is A ⊕ B and the Carry column is A · B.
Karnaugh maps (K-maps) are a graphical form of truth table that groups adjacent 1-cells to simplify boolean expressions — use the Karnaugh Map Solver to see this in action.
Real-World Applications
Truth tables provide a ground-truth specification for any gate or circuit, used to verify that an implementation matches the specification.
Starting from a verbal specification, truth tables capture the desired behaviour before converting to gate circuits.
Digital logic coursework universally uses truth tables to specify circuits and to derive boolean expressions via sum-of-minterms.
Truth tables directly map to Verilog/VHDL test vectors for simulating hardware description language designs.
The 1-rows of a truth table give minterms for SOP form; the 0-rows give maxterms for POS form.
Try It in the Interactive Simulator
Build Truth Table Generator circuits in real time — drag gates, connect wires, toggle inputs, and see outputs update instantly.
Frequently Asked Questions
- What is a truth table?
A truth table is a table showing all possible input combinations and the corresponding output for a logic gate or boolean function. For N inputs, it has 2^N rows.
- How do you generate a truth table for a 3-input AND gate?
A 3-input AND has 8 rows (000 to 111). The output is 1 only when A=1, B=1, and C=1. All other rows give 0.
- What is a minterm?
A minterm is a row in a truth table where the output is 1. In SOP (Sum of Products) form, each minterm contributes one AND term. Minterms are numbered by the decimal value of the input combination.
- How is a truth table related to a Karnaugh map?
A Karnaugh map is a 2D layout of a truth table arranged so that adjacent cells differ by exactly one bit. This adjacency property makes it easy to spot groups of 1s for boolean simplification.
- Can you use truth tables for sequential circuits?
Truth tables describe combinational logic (memoryless). Sequential circuits with memory (flip-flops) are described using state tables and state diagrams instead.