Overview
The OR gate outputs HIGH (logic 1) when at least one of its inputs is HIGH. Only when every input is LOW (logic 0) does the output remain LOW. This mirrors the inclusive "or" in natural language: the result is true if A is true, or B is true, or both are true.
The boolean expression for a 2-input OR gate is Y = A + B, where the plus symbol (+) denotes logical OR. In circuit diagrams, the gate has a curved body with pointed output — resembling a shield or arrowhead. It is implemented in CMOS technology using PMOS transistors in series (pull-up) and NMOS transistors in parallel (pull-down), which is the complement of the AND transistor arrangement.
Standard ICs such as the 74HC32 (quad 2-input OR gate) package four OR gates in a single chip. OR gates are fundamental to alarm systems, priority encoders, and any circuit that must respond to multiple possible triggers.
Truth Table
| A | B | Output (Y) |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
How It Works
A CMOS OR gate is typically built as a NOR gate followed by an inverter. The NOR gate's pull-up network has PMOS transistors in series — the output is HIGH only when all inputs are LOW. The pull-down network has NMOS transistors in parallel — the output is pulled LOW when any input is HIGH. Inverting the NOR output produces OR behaviour.
OR gates can have any number of inputs. For N inputs, the output is HIGH when at least one input is HIGH. In the simulator you can use the standard 2-input OR gate or the 3-input OR3 gate to build wider logic.
OR gates combine naturally with AND gates to implement Sum-of-Products (SOP) boolean expressions — the standard form used in Karnaugh map simplification and logic minimisation.
Real-World Applications
Any one of multiple sensors triggering causes the alarm output to activate — a classic OR gate application in industrial safety.
OR gates merge multiple request lines so that any active request raises a flag for the encoder to process.
A microprocessor interrupt signal is the OR of many peripheral interrupt requests, allowing any device to trigger the CPU.
In Sum-of-Products form, product (AND) terms are ORed together to produce a complete boolean function.
OR gates combine partial signals in multiplexer and demultiplexer circuits to route data across shared buses.
Try It in the Interactive Simulator
Build OR Gate circuits in real time — drag gates, connect wires, toggle inputs, and see outputs update instantly.
Frequently Asked Questions
- What is an OR gate?
An OR gate outputs 1 when at least one input is 1. It implements logical disjunction: Y = A + B. Only when all inputs are 0 does the output equal 0.
- What is the difference between OR and XOR gates?
An OR gate outputs 1 when any or all inputs are 1, including when both inputs are 1. An XOR gate outputs 1 only when inputs are different — it excludes the case where both are 1.
- How many transistors does an OR gate need?
A 2-input CMOS OR gate uses 6 transistors: 4 for the NOR gate and 2 for the inverter. A NOR gate alone is 4 transistors.
- Is OR gate a universal gate?
No. OR gate alone cannot implement every boolean function. NOR gate is universal; OR is not.
- What is the IC number for OR gate?
Common TTL/CMOS OR gate ICs include the 74LS32 (quad 2-input OR, TTL) and 74HC32 (quad 2-input OR, CMOS).