Overview
Binary adders are the arithmetic heart of every CPU, GPU, and digital signal processor. They perform addition of binary numbers using combinations of logic gates, forming the basis of all integer arithmetic in digital systems. Understanding binary adders is fundamental to computer architecture and digital design.
The simplest adder — the half adder — adds two 1-bit numbers and produces a Sum and a Carry output. The more useful full adder adds three bits (A, B, and a Carry-In) to produce Sum and Carry-Out. By chaining full adders, you create a ripple-carry adder capable of adding numbers of any bit width.
In this simulator, you can build half adders and full adders from scratch using XOR, AND, and OR gates, or load them from the prebuilt circuit library. Experiment with 4-bit ripple-carry adders to see how carry propagation works and why it limits performance at high clock speeds.
How It Works
Binary addition follows the same rules as decimal addition but in base 2: 0+0=0, 0+1=1, 1+0=1, 1+1=10 (sum=0, carry=1).
Half Adder: Two inputs (A, B). Sum = A ⊕ B. Carry = A · B. Built from one XOR gate and one AND gate.
Full Adder: Three inputs (A, B, Cin). Sum = A ⊕ B ⊕ Cin. Cout = AB + Cin(A ⊕ B). Built from two XOR gates, two AND gates, and one OR gate — or from two half adders and an OR gate.
Ripple-Carry Adder: Connect N full adders in series. The Carry-Out of each stage feeds the Carry-In of the next. The carry "ripples" through all stages, which limits speed — carry must propagate through all N stages before the final sum is valid. Modern CPUs use carry-lookahead adders to compute carries in parallel and dramatically increase speed.
Real-World Applications
Every ALU contains adders for integer addition, subtraction (via two's complement), comparison, and address calculation.
FPUs use adder arrays for mantissa addition in IEEE 754 floating-point arithmetic operations.
DSP chips accumulate sums of products (multiply-accumulate operations) using high-speed parallel adders.
Counters increment a binary value each clock cycle — effectively adding 1 repeatedly using optimised adder circuits.
Address generators in CPUs calculate effective addresses by adding base registers and offsets using hardware adders.
Try It in the Interactive Simulator
Build Binary Adder circuits in real time — drag gates, connect wires, toggle inputs, and see outputs update instantly.
Frequently Asked Questions
- What is the difference between a half adder and a full adder?
A half adder adds two bits (A and B) and produces Sum and Carry. A full adder adds three bits (A, B, Carry-In) and produces Sum and Carry-Out. Full adders can be chained for multi-bit addition.
- What gates are needed for a full adder?
A full adder requires two XOR gates, two AND gates, and one OR gate. Sum = A⊕B⊕Cin. Cout = AB + Cin·(A⊕B).
- What is a ripple-carry adder?
A ripple-carry adder chains N full adders where the Carry-Out of each stage feeds the Carry-In of the next. It is simple but slow because carry must propagate (ripple) through all stages sequentially.
- How does binary addition work?
Binary addition: 0+0=0, 0+1=1, 1+0=1, 1+1=10 (write 0 carry 1). For multi-bit numbers, add column by column right to left, carrying into the next column when the sum exceeds 1.
- What is two's complement and why does it enable subtraction?
Two's complement represents negative numbers so that the same adder circuit performs subtraction: A - B = A + (-B) = A + (B's complement + 1). This eliminates separate subtractor circuits.