Overview
The full adder is the foundational building block of multi-bit binary arithmetic. Unlike the half adder, it accepts three inputs: two data bits (A and B) and a Carry-In (Cin) from the previous stage. It produces two outputs: a Sum bit and a Carry-Out (Cout) for the next stage. By chaining full adders — each carry-out connecting to the next carry-in — you build a ripple-carry adder capable of adding binary numbers of any width.
The full adder implements the binary addition of three single-bit values. In decimal: 0+0+0=0, 0+0+1=1, 0+1+0=1, 0+1+1=2 (=10₂), 1+0+0=1, 1+0+1=2, 1+1+0=2, 1+1+1=3 (=11₂). The Sum is the least significant bit of this result; the Carry-Out is the most significant bit.
In terms of logic gates, a full adder requires five gates: two XOR, two AND, and one OR. Alternatively, it is constructed from two half adders and one OR gate, providing a clean hierarchical design.
Truth Table
| A | B | Cin | Sum (S) | Cout |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
How It Works
Full adder equations: Sum = A ⊕ B ⊕ Cin (two cascaded XOR gates) Cout = A·B + Cin·(A ⊕ B) (two ANDs + one OR)
Implementation from two half adders: HA1: S1 = A ⊕ B, C1 = A · B HA2: Sum = S1 ⊕ Cin, C2 = S1 · Cin Cout = C1 OR C2
In a ripple-carry adder, Cout of stage i becomes Cin of stage i+1. The delay accumulates: for an N-bit adder, worst-case carry must ripple through all N stages. A 32-bit ripple adder has 32 full adder delays on the critical path. Carry-lookahead adders solve this by computing all carries simultaneously, achieving O(log N) delay.
Real-World Applications
Chain N full adders to add N-bit numbers. The carry ripples from LSB to MSB, producing the N-bit sum.
A full adder with Cin=1 and B inverted computes A - B using two's complement addition, eliminating dedicated subtractor circuits.
High-speed adders generate and propagate signals (G=AB, P=A⊕B) from full adders to compute carries in parallel rather than rippling.
Booth's multiplication algorithm uses arrays of full adders (a Wallace tree or Dadda tree) to sum partial products in parallel.
ECC circuits use adder trees to compute syndromes and parity — the core operations in Hamming code decoding.
Try It in the Interactive Simulator
Build Full Adder circuits in real time — drag gates, connect wires, toggle inputs, and see outputs update instantly.
Frequently Asked Questions
- What is a full adder?
A full adder adds three binary inputs (A, B, Carry-In) and produces Sum and Carry-Out. Sum = A ⊕ B ⊕ Cin. Cout = AB + Cin(A⊕B). It can be chained to add multi-bit numbers.
- How many gates does a full adder need?
A full adder needs 5 gates: 2 XOR + 2 AND + 1 OR. Or equivalently: 2 half adders + 1 OR gate.
- What is the full adder truth table?
An 8-row table with inputs A, B, Cin and outputs Sum, Cout. Cin=0 rows match the half adder. When all three inputs are 1, Sum=1 and Cout=1 (1+1+1=11₂).
- How do you build a 4-bit adder from full adders?
Connect four full adders in series. FA0 adds the LSBs with Cin=0. FA1 adds the next bits with Cin=FA0.Cout. FA2 and FA3 continue the chain. FA3.Cout is the overflow/carry-out of the 4-bit sum.
- What is carry lookahead?
Carry lookahead computes all carry signals simultaneously from generate (G=AB) and propagate (P=A⊕B) signals, avoiding ripple delay. A 4-bit carry-lookahead adder computes all carries in 2 gate delays regardless of bit width.